FG Architektur eingebetteter Systeme

Publications 62 Items

RSS Feed RSS Feed RSS Feed

PreviewIssue DateTitleAuthor(s)Editor(s)
andersch_etal_2015.pdf.jpg2015On latency in GPU throughput microarchitecturesAndersch, Michael; Lucas, Jan; Álvarez-Mesa, Mauricio; Juurlink, Ben-
schoenherr_juurlink_richling.pdf.jpg2014TACO: A scheduling scheme for parallel applications on multicore architecturesSchönherr, Jan H.; Juurlink, Ben; Richling, Jan-
2015_cebrian_marquez_etal.pdf.jpg2015Reducing HEVC encoding complexity using two-stage motion estimationCebrián-Márquez, Gabriel; Chi, Ching Chi; Martínez, José Luis; Cuenca, Pedro; Sanz-Rodríguez, Sergio; Álvarez Mesa, Mauricio; Juurlink, Ben-
borodin_juurlink.pdf.jpg2010Protective redundancy overhead reduction using instruction vulnerability factorBorodin, Demid; Juurlink, Ben-
2012_chi_alvarez_mesa_etal.pdf.jpg2012Parallel scalability and efficiency of HEVC parallelization approachesChi, Ching Chi; Álvarez-Mesa, Mauricio; Juurlink, Ben; Clare, Gordon; Henry, Félix; Pateux, Stéphane; Thomas, Schierl-
10.1117.12.2030009.pdf.jpg2013HEVC real-time decodingBross, Benjamin; Álvarez-Mesa, Mauricio; George, Valeri; Chi, Chi Ching; Mayer, Tobias; Juurlink, Ben; Schierl, Thomas-
10.1016.j.image.2015.05.004.pdf.jpg2015Two-level sliding-window VBR control algorithm for video on demand streamingde-Frutos-López, Manuel; González-de-Suso, José Luis; Sanz-Rodríguez, Sergio; Peláez-Moreno, Carmen; Díaz-de-María, Fernando-
10.1007.s11265-012-0714-2.pdf.jpg2013Parallel HEVC Decoding on Multi- and Many-core ArchitecturesChi, Chi Ching; Álvarez-Mesa, Mauricio; Lucas, Jan; Juurlink, Ben; Schierl, Thomas-
10.1007.978-3-642-15277-1_29.pdf.jpg2010Extending the Cell SPE with Energy Efficient Branch PredictionBriejer, Martijn; Meenderinck, Cor; Juurlink, Ben-
10.1007.978-3-642-36949-0_18.pdf.jpg2013An Optimized Parallel IDCT on Graphics Processing UnitsWang, Biao; Álvarez-Mesa, Mauricio; Chi, Chi Ching; Juurlink, Ben-
azevedo_juurlink.pdf.jpg2011An Instruction to Accelerate Software CachesAzevedo, Arnaldo; Juurlink, Ben-
habermann2014.pdf.jpg2014Design and Implementation of a High-Throughput CABAC Hardware Accelerator for the HEVC DecoderHabermann, Philipp-
goebel2014.pdf.jpg2014A High-Performance Hardware Accelerator for HEVC Motion CompensationGöbel, Matthias-
10.1007.978-3-319-16214-0_20.pdf.jpg2015An efficient and flexible FPGA implementation of a face detection systemFekih, Hichem Ben; Elhossini, Ahmed; Juurlink, Ben-
gervin_juurlink_tutsch.pdf.jpg2011Traffic Prediction for NoCs using Fuzzy LogicThomas, Gervin; Juurlink, Ben; Tutsch, Dietmar-
10.1016.j.image.2014.10.003.pdf.jpg2015A parallel H.264/SVC encoder for high definition video conferencingSanz-Rodríguez, Sergio; Álvarez-Mesa, Mauricio; Mayer, Tobias; Schierl, Tobias-
manthey_kristian.pdf.jpg2017A reconfigurable architecture for real-time image compression on-board satellitesManthey, Kristian-
libWater.pdf.jpg2013libWater: heterogeneous distributed computing made easyGrasso, Ivan; Pellegrini, Simone; Cosenza, Biagio; Fahringer, Thomas-
Low_Power_High.pdf.jpg2015Low-power high-efficiency video decoding using general purpose processorsChi, Chi Ching; Álvarez-Mesa, Mauricio; Juurlink, Ben-
A_generic_implementation.pdf.jpg2014A generic implementation of a quantified predictor on FPGAsThomas, Gervin; Elhossini, Ahmed; Juurlink, Ben-
Collection's Items (Sorted by Submit Date in Descending order): 1 to 20 of 62