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Main Title: SIMD acceleration for HEVC decoding
Author(s): Chi, Chi Ching
Álvarez-Mesa, Mauricio
Bross, Benjamin
Juurlink, Ben
Schierl, Thomas
Type: Article
Language Code: en
Abstract: Single instruction multiple data (SIMD) instructions have been commonly used to accelerate video codecs. The recently introduced High Efficiency Video Coding (HEVC) codec like its predecessors is based on the hybrid video codec principle and, therefore, is also well suited to be accelerated with SIMD. In this paper we present the SIMD optimization for the entire HEVC decoder for all major SIMD instruction set architectures. Evaluation has been performed on 14 mobile and PC platforms covering most major architectures released in recent years. With SIMD, up to 5× speedup can be achieved over the entire HEVC decoder, resulting in up to 133 and 37.8 frames/s on average on a single core for Main profile 1080p and Main10 profile 2160p sequences, respectively.
Issue Date: 2015
Date Available: 23-Feb-2017
DDC Class: 004 Datenverarbeitung; Informatik
620 Ingenieurwissenschaften und zugeordnete Tätigkeiten
Subject(s): AVX
Advanced Vector Extensions (AVX)
High Efficiency Video Coding (HEVC)
Streaming SIMD Extensions (SSE)
single instruction multiple data (SIMD)
ultrahigh definition (UHD)
Sponsor/Funder: EC/FP7/288653/EU/Low-Power Parallel Computing on GPUs/LPGPU
Journal Title: IEEE transactions on circuits and systems for video technology : a publication of the Circuits and Systems Society
Publisher: IEEE
Publisher Place: New York, NY [u.a.]
Volume: 25
Issue: 5
Publisher DOI: 10.1109/TCSVT.2014.2364413
Page Start: 841
Page End: 855
EISSN: 1558-2205
ISSN: 1051-8215
Appears in Collections:FG Architektur eingebetteter Systeme » Publications

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