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Main Title: A hybrid transport/control operation triggered architecture
Author(s): Moser, Nico
Hauser, Stefan
Gremzow, Carsten
Type: Conference Object
Language Code: en
Abstract: We present an approach to a scalable and extensible processor architecture with inherent parallelism named synZEN. One aim was to create a synthesizable application specific processor which can be mapped to an FPGA. Besides architectural features like the interconnection network for flexible data transport and synZEN units with communication managing interface we give an overview of the programming model, show basic operation design and depict assembler notations to program these architecture. The paper closes with a brief toolchain overview and some synthesis results that support our design decisions.
Issue Date: 2010
Date Available: 23-Feb-2017
DDC Class: 004 Datenverarbeitung; Informatik
Subject(s): registers
multiprocessor interconnection
parallel processing
Proceedings Title: 23th International Conference on Architecture of Computing Systems 2010 : ARCS
Publisher: VDE-Verlag
Publisher Place: Berlin, Offenbach
Page Start: 1
Page End: 5
ISBN: 978-3-8007-3222-7
Appears in Collections:FG Architektur eingebetteter Systeme » Publications

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