Please use this identifier to cite or link to this item: http://dx.doi.org/10.14279/depositonce-8185
Main Title: SLC: Memory Access Granularity Aware Selective Lossy Compression for GPUs
Author(s): Lal, Sohan
Lucas, Jan
Juurlink, Ben
Type: Conference Object
Language Code: en
Abstract: Memory compression is a promising approach for reducing memory bandwidth requirements and increasing performance, however, memory compression techniques often result in a low effective compression ratio due to large memory access granularity (MAG) exhibited by GPUs. Our analysis of the distribution of compressed blocks shows that a significant percentage of blocks are compressed to a size that is only a few bytes above a multiple of MAG, but a whole burst is fetched from memory. These few extra bytes significantly reduce the compression ratio and the performance gain that otherwise could result from a higher raw compression ratio. To increase the effective compression ratio, we propose a novel MAG aware Selective Lossy Compression (SLC) technique for GPUs. The key idea of SLC is that when lossless compression yields a compressed size with few bytes above a multiple of MAG, we approximate these extra bytes such that the compressed size is a multiple of MAG. This way, SLC mostly retains the quality of a lossless compression and occasionally trades small accuracy for higher performance. We show a speedup of up to 35% normalized to a state-of-the-art lossless compression technique with a low loss in accuracy. Furthermore, average energy consumption and energy-delay- product are reduced by 8.3% and 17.5%, respectively.
URI: https://depositonce.tu-berlin.de//handle/11303/9084
http://dx.doi.org/10.14279/depositonce-8185
Issue Date: 2019
Date Available: 11-Feb-2019
DDC Class: 004 Datenverarbeitung; Informatik
Subject(s): GPU
memory
compression
memory access granularity
MAG
Selective Lossy Compression
SLC
Sponsor/Funder: EC/H2020/688759/EU/Low-Power Parallel Computing on GPUs 2/LPGPU2
License: http://rightsstatements.org/vocab/InC/1.0/
Proceedings Title: 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Publisher: Institute of Electrical and Electronics Engineers (IEEE)
Publisher Place: New York, NY
EISSN: 1558-1101
Appears in Collections:FG Architektur eingebetteter Systeme » Publications

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