A High-Performance Hardware Accelerator for HEVC Motion Compensation

dc.contributor.authorGöbel, Matthias
dc.date.accessioned2018-04-12T14:28:56Z
dc.date.available2018-04-12T14:28:56Z
dc.date.issued2014
dc.description.abstractThe presented master’s thesis has focused on the design and implementation of a motion compensation hardware accelerator for use in HEVC hybrid decoders, i.e. decoders that contain hardware as well as software parts. As the motion compensation is the most time consuming step in the decoding process it is crucial to implement it in a fast and efficient way. This paper elaborates the theoretical background and motivation and highlights the main design choices. In the following evaluation a comparison between the hybrid decoder and a pure software decoder is performed. The results show that the design is capable of increasing the decoding frame rate in the range of 60% for 1080p video streams when running at 100 MHz.en
dc.identifier.isbn978-3-88579-447-9
dc.identifier.issn1614-3213
dc.identifier.urihttps://depositonce.tu-berlin.de//handle/11303/7565
dc.identifier.urihttp://dx.doi.org/10.14279/depositonce-6779
dc.language.isoenen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subject.ddc004 Datenverarbeitung; Informatikde
dc.subject.otherHigh Efficiency Video Codingen
dc.subject.otherHEVCen
dc.subject.othermotion compensationen
dc.subject.otherhardware decoderen
dc.subject.othersoftware decoderen
dc.subject.otherhybrid decoderen
dc.titleA High-Performance Hardware Accelerator for HEVC Motion Compensationen
dc.typeConference Objecten
dc.type.versionpublishedVersionen
dcterms.bibliographicCitation.originalpublishernameGesellschaft für Informatiken
dcterms.bibliographicCitation.originalpublisherplaceBonnen
dcterms.bibliographicCitation.pageend212en
dcterms.bibliographicCitation.pagestart209en
dcterms.bibliographicCitation.proceedingstitleInformatiktage 2014 / Fachwissenschaftlicher Informatik-Kongress, 27. und 28. März 2014, Hasso-Plattner-Institut der Universität Potsdamen
dcterms.bibliographicCitation.volumeS-13en
tub.accessrights.dnbfreeen
tub.affiliationFak. 4 Elektrotechnik und Informatik>Inst. Technische Informatik und Mikroelektronik>FG Architektur eingebetteter Systemede
tub.affiliation.facultyFak. 4 Elektrotechnik und Informatikde
tub.affiliation.groupFG Architektur eingebetteter Systemede
tub.affiliation.instituteInst. Technische Informatik und Mikroelektronikde
tub.publisher.universityorinstitutionTechnische Universität Berlinen
tub.series.nameGI-Edition : lecture notes in informatics ; series of the Gesellschaft für Informatiken
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