A Benchmark Suite for Evaluating Parallel Programming Models
dc.contributor.author | Andersch, Michael | |
dc.contributor.author | Juurlink, Ben | |
dc.contributor.author | Chi, Chi Ching | |
dc.date.accessioned | 2018-07-11T08:40:54Z | |
dc.date.available | 2018-07-11T08:40:54Z | |
dc.date.issued | 2011 | |
dc.description.abstract | The transition to multi-core processors enforces software developers to explicitly exploit thread-level parallelism to increase performance. The associated programmability problem has led to the introduction of a plethora of parallel programming models that aim at simplifying software development by raising the abstraction level. Since industry has not settled for a single model, however, multiple significantly different approaches exist. This work presents a benchmark suite which can be used to classify and compare such parallel programming models and, therefore, aids in selecting the appropriate programming model for a given task. After a detailed explanation of the suite's design, preliminary results for two programming models, Pthreads and OmpSs/SMPSs, are presented and analyzed, leading to an outline of further extensions of the suite. | en |
dc.description.sponsorship | EC/FP7/248647/EU/ENabling technologies for a programmable many-CORE/ENCORE | en |
dc.identifier.issn | 0177-0454 | |
dc.identifier.uri | https://depositonce.tu-berlin.de/handle/11303/8009 | |
dc.identifier.uri | http://dx.doi.org/10.14279/depositonce-7172 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12116/8577 | |
dc.language.iso | en | en |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
dc.subject.ddc | 004 Datenverarbeitung; Informatik | de |
dc.subject.other | programming model | en |
dc.subject.other | benchmark suite | en |
dc.subject.other | parallelization approach | en |
dc.subject.other | parallel programming model | en |
dc.subject.other | chip multiprocessor | en |
dc.title | A Benchmark Suite for Evaluating Parallel Programming Models | en |
dc.title.subtitle | Introduction and Preliminary Results | en |
dc.type | Article | en |
dc.type.version | publishedVersion | en |
dcterms.bibliographicCitation.issue | 1 | en |
dcterms.bibliographicCitation.journaltitle | PARS: Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware | en |
dcterms.bibliographicCitation.originalpublishername | Gesellschaft für Informatik e.V., Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware, PARS | en |
dcterms.bibliographicCitation.originalpublisherplace | Erlangen | en |
dcterms.bibliographicCitation.pageend | 17 | en |
dcterms.bibliographicCitation.pagestart | 7 | en |
dcterms.bibliographicCitation.volume | 28 | en |
tub.accessrights.dnb | free | en |
tub.affiliation | Fak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Architektur eingebetteter Systeme | de |
tub.affiliation.faculty | Fak. 4 Elektrotechnik und Informatik | de |
tub.affiliation.group | FG Architektur eingebetteter Systeme | de |
tub.affiliation.institute | Inst. Technische Informatik und Mikroelektronik | de |
tub.publisher.universityorinstitution | Technische Universität Berlin | en |