SynZEN: a hybrid TTA/VLIW architecture with a distributed register file

dc.contributor.authorHauser, Stefan
dc.contributor.authorMoser, Nico
dc.contributor.authorJuurlink, Ben
dc.date.accessioned2017-02-23T09:48:44Z
dc.date.available2017-02-23T09:48:44Z
dc.date.issued2012
dc.description.abstractThe quest for higher performance within a certain power budget in the fields of embedded computing demands unconventional architectural approaches. To this end, in this paper we present synZEN (sZ): a (micro-)architecture that combines features of very long instruction word (VLIW) and transport triggered architectures (TTAs) to cover the needs of different applications. SynZEN features a distributed register file (RF) (i.e., each functional unit (FU) has its own RF) and a wide memory connection to exploit spatial data locality. FPGA synthesis results demonstrate that due to the distributed RF the sZ design can be implemented in less area (in terms of FPGA slices) than existing TTA and VLIW designs. Furthermore, using two micro-benchmarks we show that because of the wide memory connection, sZ outperforms both the TTA as well as the VLIW design.en
dc.identifier.isbn978-1-4673-2221-8
dc.identifier.urihttp://depositonce.tu-berlin.de/handle/11303/6178
dc.identifier.urihttp://dx.doi.org/10.14279/depositonce-5743
dc.language.isoen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.subject.ddc004 Datenverarbeitung; Informatik
dc.subject.othercomputer architectureen
dc.subject.otherfield programmable gate arraysen
dc.subject.otherhardwareen
dc.subject.otherradio frequencyen
dc.subject.otherregisters|VLIWen
dc.subject.otherintegrated circuit designen
dc.subject.otherlogic designen
dc.subject.othermicroprocessor chipsen
dc.subject.othermultiprocessing systemsen
dc.titleSynZEN: a hybrid TTA/VLIW architecture with a distributed register fileen
dc.typeConference Objecten
dc.type.versionacceptedVersionen
dcterms.bibliographicCitation.doi10.1109/NORCHP.2012.6403142
dcterms.bibliographicCitation.originalpublishernameIEEEen
dcterms.bibliographicCitation.originalpublisherplaceNew York, NY [u.a.]en
dcterms.bibliographicCitation.pageend4
dcterms.bibliographicCitation.pagestart1
dcterms.bibliographicCitation.proceedingstitleNORCHIP 2012en
tub.accessrights.dnbdomain
tub.affiliationFak. 4 Elektrotechnik und Informatik>Inst. Technische Informatik und Mikroelektronik>FG Architektur eingebetteter Systemede
tub.affiliation.facultyFak. 4 Elektrotechnik und Informatikde
tub.affiliation.groupFG Architektur eingebetteter Systemede
tub.affiliation.instituteInst. Technische Informatik und Mikroelektronikde
tub.publisher.universityorinstitutionTechnische Universität Berlinen
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