Poster: implications of merging phases on scalability of multi-core architectures

dc.contributor.authorManivannan, Madhavan
dc.contributor.authorJuurlink, Ben
dc.contributor.authorStenstrom, Per
dc.date.accessioned2017-10-26T10:38:27Z
dc.date.available2017-10-26T10:38:27Z
dc.date.issued2011
dc.description.abstractAmdahl's Law estimates parallel applications with negligible serial sections to potentially scale to many cores. However, due to merging phases in data mining applications, the serial sections do not remain constant. We extend Amdahl's model to accommodate this and establish that Amdahl's Law can overestimate the scalability offered by symmetric and asymmetric architectures for such applications. Implications: 1) A better use of the chip area is for fewer and hence more capable cores rather than simply increasing the number of cores for symmetric and asymmetric architectures and 2) The performance potential of asymmetric over symmetric multi-core architectures is limited for such applications.en
dc.identifier.isbn978-1-4503-0102-2
dc.identifier.urihttps://depositonce.tu-berlin.de/handle/11303/7017
dc.identifier.urihttp://dx.doi.org/10.14279/depositonce-6338
dc.language.isoen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.subject.ddc004 Datenverarbeitung; Informatik
dc.subject.otheramdahl's lawen
dc.subject.othermulti-core architectureen
dc.subject.otherreduction operationsen
dc.titlePoster: implications of merging phases on scalability of multi-core architecturesen
dc.typeConference Objecten
dc.type.versionacceptedVersionen
dcterms.bibliographicCitation.doi10.1145/1995896.1995963
dcterms.bibliographicCitation.originalpublishernameAssociation for Computing Machinery (ACM)en
dcterms.bibliographicCitation.originalpublisherplaceNew York, NYen
dcterms.bibliographicCitation.pageend380
dcterms.bibliographicCitation.pagestart380
dcterms.bibliographicCitation.proceedingstitleProceedings of the International Conference on Supercomputingen
tub.accessrights.dnbdomain
tub.affiliationFak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Architektur eingebetteter Systemede
tub.affiliation.facultyFak. 4 Elektrotechnik und Informatikde
tub.affiliation.groupFG Architektur eingebetteter Systemede
tub.affiliation.instituteInst. Technische Informatik und Mikroelektronikde
tub.publisher.universityorinstitutionTechnische Universität Berlinen

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