Chip Multiprocessor Traffic Models Providing Consistent Multicast and Spatial Distributions
| dc.contributor.author | Tutsch, Dietmar | |
| dc.contributor.author | Lüdtke, Daniel | |
| dc.date.accessioned | 2019-01-08T17:55:36Z | |
| dc.date.available | 2019-01-08T17:55:36Z | |
| dc.date.issued | 2008 | |
| dc.description | Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich. | de |
| dc.description | This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively. | en |
| dc.description.abstract | Chip multiprocessors (CMPs) have become the center of attention in recent years. They consist of multiple processor cores on a single chip. These cores are connected on-chip by a bus or, if many cores are involved, by an appropriate network. To investigate how a multicore processor behaves dependent on the chosen network-on-chip topology, a corresponding model must be established for performance evaluation. Modeling and simulating the entire system would lead to high model complexity. Thus, it is more reasonable to exclude the cores and to simply model stochastically the detached network. The cores are replaced by traffic generators which must provide reasonable CMP traffic. It usually consists of multicasts and a particular spatial distribution. Because the traffic is not known exactly, both multicasts and spatial traffic are described as stochastic distributions for model input. The easiest way is to specify the spatial distribution of the traffic and the kind of multicasts independently of each other. However, not all multicast distributions can be achieved with a particular desired spatial distribution and vice versa. It is therefore important to check for the compatibility of the spatial distribution and the multicasts that the modeler is willing to investigate. Such a compatibility check is provided by the algorithm presented in this paper. It prevents inconsistent traffic parameters while modeling. | en |
| dc.identifier.eissn | 1741-3133 | |
| dc.identifier.issn | 0037-5497 | |
| dc.identifier.uri | https://depositonce.tu-berlin.de/handle/11303/8951 | |
| dc.identifier.uri | http://dx.doi.org/10.14279/depositonce-8080 | |
| dc.language.iso | en | |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | |
| dc.subject.ddc | 004 Datenverarbeitung; Informatik | de |
| dc.subject.other | stochastic traffic modeling | en |
| dc.subject.other | network-on-chip | en |
| dc.subject.other | multicore processor | en |
| dc.subject.other | multicast distribution | en |
| dc.subject.other | spatial traffic distribution | en |
| dc.title | Chip Multiprocessor Traffic Models Providing Consistent Multicast and Spatial Distributions | en |
| dc.type | Article | en |
| dc.type.version | publishedVersion | en |
| dcterms.bibliographicCitation.doi | 10.1177/0037549708091638 | |
| dcterms.bibliographicCitation.issue | 2-3 | |
| dcterms.bibliographicCitation.journaltitle | Simulation : transactions of The Society for Modeling and Simulation International | en |
| dcterms.bibliographicCitation.originalpublishername | SAGE Publications | en |
| dcterms.bibliographicCitation.originalpublisherplace | Washington, DC | en |
| dcterms.bibliographicCitation.pageend | 73 | |
| dcterms.bibliographicCitation.pagestart | 61 | |
| dcterms.bibliographicCitation.volume | 84 | |
| tub.accessrights.dnb | domain | |
| tub.affiliation | Fak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Robotics | de |
| tub.affiliation.faculty | Fak. 4 Elektrotechnik und Informatik | de |
| tub.affiliation.group | FG Robotics | de |
| tub.affiliation.institute | Inst. Technische Informatik und Mikroelektronik | de |
| tub.publisher.universityorinstitution | Technische Universität Berlin | de |
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