Enabling GPU software developers to optimize their applications – The LPGPU2approach
| dc.contributor.author | Juurlink, Ben | |
| dc.contributor.author | Lucas, Jan | |
| dc.contributor.author | Mammeri, Nadjib | |
| dc.contributor.author | Keramidas, Georgios | |
| dc.contributor.author | Pontzolkova, Katerina | |
| dc.contributor.author | Aransay, Ignacio | |
| dc.contributor.author | Kokkala, Chrysa | |
| dc.contributor.author | Bliss, Martyn | |
| dc.contributor.author | Richards, Andrew | |
| dc.date.accessioned | 2018-11-07T14:53:29Z | |
| dc.date.available | 2018-11-07T14:53:29Z | |
| dc.date.issued | 2017 | |
| dc.description.abstract | Low-power GPUs have become ubiquitous, they can be found in domains ranging from wearable and mobile computing to automotive systems. With this ubiquity has come a wider range of applications exploiting low-power GPUs, placing ever increasing demands on the expected performance and power efficiency of the devices. The LPGPU 2 project is an EU-funded, Innovation Action, 30-month-project targeting to develop an analysis and visualization framework that enables GPU application developers to improve the performance and power consumption of their applications. To this end, the project follows a holistic approach. First, several applications (use cases) are being developed for or ported to low-power GPUs. These applications will be optimized using the tooling framework in the last phase of the project. In addition, power measurement devices and power models are devised that are 10× more accurate than the state of the art. The ultimate goal of the project is to promote open vendor-neutral standards via the Khronos group. This paper briefly reports on the achievements made in the first phase of the project (till month 18) and focuses on the progress made in applications; in power measurement, estimation, and modelling; and in the analysis and visualization tool suite. | en |
| dc.description.sponsorship | EC/H2020/688759/EU/Low-Power Parallel Computing on GPUs 2/LPGPU2 | en |
| dc.identifier.isbn | 978-1-5386-3534-6 | |
| dc.identifier.isbn | 978-1-5386-3533-9 | |
| dc.identifier.isbn | 978-1-5386-3535-3 | |
| dc.identifier.uri | https://depositonce.tu-berlin.de/handle/11303/8425 | |
| dc.identifier.uri | http://dx.doi.org/10.14279/depositonce-7571 | |
| dc.language.iso | en | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
| dc.subject.ddc | 004 Datenverarbeitung; Informatik | en |
| dc.subject.other | GPU | en |
| dc.subject.other | low power | en |
| dc.subject.other | embedded computing | en |
| dc.subject.other | power modelling | en |
| dc.subject.other | performance counters | en |
| dc.subject.other | microbenchmarks | en |
| dc.subject.other | visualization | en |
| dc.subject.other | API interposer | en |
| dc.subject.other | data collection | en |
| dc.title | Enabling GPU software developers to optimize their applications – The LPGPU2approach | en |
| dc.type | Conference Object | en |
| dc.type.version | acceptedVersion | en |
| dcterms.bibliographicCitation.doi | 10.1109/DASIP.2017.8122116 | en |
| dcterms.bibliographicCitation.originalpublishername | IEEE | en |
| dcterms.bibliographicCitation.originalpublisherplace | Piscataway, New Jersey | en |
| dcterms.bibliographicCitation.proceedingstitle | 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP) | en |
| tub.accessrights.dnb | free | en |
| tub.affiliation | Fak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Architektur eingebetteter Systeme | de |
| tub.affiliation.faculty | Fak. 4 Elektrotechnik und Informatik | de |
| tub.affiliation.group | FG Architektur eingebetteter Systeme | de |
| tub.affiliation.institute | Inst. Technische Informatik und Mikroelektronik | de |
| tub.publisher.universityorinstitution | Technische Universität Berlin | en |