A predictor-based power-saving policy for DRAM memories

dc.contributor.authorThomas, Gervin
dc.contributor.authorChandrasekar, Karthik
dc.contributor.authorÃ…kesson, Benny
dc.contributor.authorJuurlink, Ben
dc.contributor.authorGoossens, Kees
dc.date.accessioned2017-03-09T08:30:24Z
dc.date.available2017-03-09T08:30:24Z
dc.date.issued2012
dc.description.abstractReducing power/energy consumption is an important goal for all computer systems, from servers to battery-driven hand-held devices. To achieve this goal, the energy consumption of all system components needs to be reduced. One of the most power-hungry components is the off-chip DRAM, even when it is idle. DRAMs support different power-saving modes, such as self-refresh and power-down, but employing them every time the DRAM is idle, reduces performance due to their power-up latencies. The self-refresh mode offers large power savings, but incurs a long power-up latency. The power-down mode, on the other hand, has a shorter power-up latency, but provides lower power savings. In this paper, we propose and evaluate a novel power-saving policy that combines the best of both power-saving modes in order to achieve significant power reductions with a marginal performance penalty. To accomplish this, we use a history-based predictor to forecast the duration of an idle period and then either employ self-refresh, or power-down, or a combination of both power saving modes. Significant refinements are made to the predictor to maximize the energy savings and minimize the performance penalty. The presented policy is evaluated using several applications from the multimedia domain and the experimental results show that it reduces the total DRAM energy consumption between 68.8% and 79.9% at a negligible performance penalty between 0.3% and 2.2%.en
dc.identifier.isbn978-1-4673-2498-4
dc.identifier.urihttps://depositonce.tu-berlin.de/handle/11303/6221
dc.identifier.urihttp://dx.doi.org/10.14279/depositonce-5780
dc.language.isoen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.subject.ddc004 Datenverarbeitung; Informatik
dc.subject.otherDRAM memoryen
dc.subject.otherpower-downen
dc.subject.otherpredictoren
dc.subject.otherpredictor-based power saving policyen
dc.subject.otherself-refreshen
dc.titleA predictor-based power-saving policy for DRAM memoriesen
dc.typeConference Objecten
dc.type.versionacceptedVersionen
dcterms.bibliographicCitation.doi10.1109/DSD.2012.11
dcterms.bibliographicCitation.originalpublishernameIEEEen
dcterms.bibliographicCitation.originalpublisherplaceNew York, NY [u.a.]en
dcterms.bibliographicCitation.pageend889
dcterms.bibliographicCitation.pagestart882
dcterms.bibliographicCitation.proceedingstitle2012 15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools : DSDen
tub.accessrights.dnbdomain
tub.affiliationFak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Architektur eingebetteter Systemede
tub.affiliation.facultyFak. 4 Elektrotechnik und Informatikde
tub.affiliation.groupFG Architektur eingebetteter Systemede
tub.affiliation.instituteInst. Technische Informatik und Mikroelektronikde
tub.publisher.universityorinstitutionTechnische Universität Berlinen

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