A Quantitative Analysis of the Memory Architecture of FPGA-SoCs
In recent years, so called FPGA-SoCs have been introduced by Intel (formerly Altera) and Xilinx. These devices combine multi-core processors with programmable logic. This paper analyzes the various memory and communication interconnects found in actual devices, particularly the Zynq-7020 and Zynq-7045 from Xilinx and the Cyclone V SE SoC from Intel. Issues such as different access patterns, cache coherence and full-duplex communication are analyzed, for both generic accesses as well as for a real workload from the field of video coding. Furthermore, the paper shows that by carefully choosing the memory interconnect networks as well as the software interface, high-speed memory access can be achieved for various scenarios.
Published in: Applied reconfigurable computing : 13th International Symposium, ARC 2017, Delft, the Netherlands, April 3-7, 2017, Proceedings, 10.1007/978-3-319-56258-2_21, Springer