A Quantitative Analysis of the Memory Architecture of FPGA-SoCs

dc.contributor.authorGöbel, Matthias
dc.contributor.authorElhossini, Ahmed
dc.contributor.authorChi, Chi Ching
dc.contributor.authorÁlvarez-Mesa, Mauricio
dc.contributor.authorJuurlink, Ben
dc.date.accessioned2018-06-08T12:18:16Z
dc.date.available2018-06-08T12:18:16Z
dc.date.issued2017
dc.description.abstractIn recent years, so called FPGA-SoCs have been introduced by Intel (formerly Altera) and Xilinx. These devices combine multi-core processors with programmable logic. This paper analyzes the various memory and communication interconnects found in actual devices, particularly the Zynq-7020 and Zynq-7045 from Xilinx and the Cyclone V SE SoC from Intel. Issues such as different access patterns, cache coherence and full-duplex communication are analyzed, for both generic accesses as well as for a real workload from the field of video coding. Furthermore, the paper shows that by carefully choosing the memory interconnect networks as well as the software interface, high-speed memory access can be achieved for various scenarios.en
dc.identifier.eissn1611-3349
dc.identifier.isbn978-3-319-56257-5
dc.identifier.isbn978-3-319-56258-2
dc.identifier.issn0302-9743
dc.identifier.urihttps://depositonce.tu-berlin.de//handle/11303/7928
dc.identifier.urihttp://dx.doi.org/10.14279/depositonce-7089
dc.language.isoenen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subject.ddc004 Datenverarbeitung; Informatikde
dc.subject.otherprogrammable logicen
dc.subject.othermemoryen
dc.subject.othervideo codingen
dc.subject.otherbandwidthen
dc.subject.otherFPGAen
dc.titleA Quantitative Analysis of the Memory Architecture of FPGA-SoCsen
dc.typeConference Objecten
dc.type.versionacceptedVersionen
dcterms.bibliographicCitation.doi10.1007/978-3-319-56258-2_21en
dcterms.bibliographicCitation.originalpublishernameSpringeren
dcterms.bibliographicCitation.originalpublisherplaceChamen
dcterms.bibliographicCitation.pageend252en
dcterms.bibliographicCitation.pagestart241en
dcterms.bibliographicCitation.proceedingstitleApplied reconfigurable computing : 13th International Symposium, ARC 2017, Delft, the Netherlands, April 3-7, 2017, Proceedingsen
tub.accessrights.dnbfreeen
tub.affiliationFak. 4 Elektrotechnik und Informatik>Inst. Technische Informatik und Mikroelektronik>FG Architektur eingebetteter Systemede
tub.affiliation.facultyFak. 4 Elektrotechnik und Informatikde
tub.affiliation.groupFG Architektur eingebetteter Systemede
tub.affiliation.instituteInst. Technische Informatik und Mikroelektronikde
tub.publisher.universityorinstitutionTechnische Universität Berlinen
tub.series.issuenumber10216en
tub.series.nameLecture Notes in Computer Scienceen
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