Extending the Cell SPE with Energy Efficient Branch Prediction
| dc.contributor.author | Briejer, Martijn | |
| dc.contributor.author | Meenderinck, Cor | |
| dc.contributor.author | Juurlink, Ben | |
| dc.date.accessioned | 2018-04-12T15:54:10Z | |
| dc.date.available | 2018-04-12T15:54:10Z | |
| dc.date.issued | 2010 | |
| dc.description.abstract | Energy-efficient dynamic branch predictors are proposed for the Cell SPE, which normally depends on compiler-inserted hint instructions to predict branches. All designed schemes use a Branch Target Buffer (BTB) to store the branch target address and the prediction, which is computed using a bimodal counter. One prediction scheme pre-decodes instructions when they are fetched from the local store and accesses the BTB only for branch instructions, thereby saving power compared to conventional dynamic predictors that access the BTB for every instruction. In addition, several ways to leverage the existing hint instructions for the dynamic branch predictor are studied. We also introduce branch warning instructions which initiate branch prediction before the actual branch instruction is fetched. They allow fetching the instructions starting at the branch target and thus completely remove the branch penalty for correctly predicted branches. For a 256-entry BTB, a speedup of up to 18.8% is achieved. The power consumption of the branch prediction schemes is estimated at 1% or less of the total power dissipation of the SPE and the average energy-delay product is reduced by up to 6.2%. | en |
| dc.identifier.eissn | 1611-3349 | |
| dc.identifier.isbn | 978-3-642-15276-4 | |
| dc.identifier.isbn | 978-3-642-15277-1 | |
| dc.identifier.issn | 0302-9743 | |
| dc.identifier.uri | https://depositonce.tu-berlin.de/handle/11303/7570 | |
| dc.identifier.uri | http://dx.doi.org/10.14279/depositonce-6784 | |
| dc.language.iso | en | en |
| dc.relation.ispartof | 10.1007/978-3-642-15277-1 | |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
| dc.subject.ddc | 004 Datenverarbeitung; Informatik | de |
| dc.subject.other | branch prediction | en |
| dc.subject.other | branch instruction | en |
| dc.subject.other | cell processor | en |
| dc.subject.other | branch predictor | en |
| dc.subject.other | branch target | en |
| dc.title | Extending the Cell SPE with Energy Efficient Branch Prediction | en |
| dc.type | Book Part | en |
| dc.type.version | acceptedVersion | en |
| dcterms.bibliographicCitation.booktitle | Euro-Par 2010 - Parallel Processing | en |
| dcterms.bibliographicCitation.doi | 10.1007/978-3-642-15277-1_29 | en |
| dcterms.bibliographicCitation.editor | D’Ambra, Pasqua | |
| dcterms.bibliographicCitation.editor | Guarracino, Mario | |
| dcterms.bibliographicCitation.editor | Talia, Domenico | |
| dcterms.bibliographicCitation.originalpublishername | Springer | en |
| dcterms.bibliographicCitation.originalpublisherplace | Berlin; Heidelberg | en |
| dcterms.bibliographicCitation.pageend | 315 | en |
| dcterms.bibliographicCitation.pagestart | 304 | en |
| tub.accessrights.dnb | free | en |
| tub.affiliation | Fak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Architektur eingebetteter Systeme | de |
| tub.affiliation.faculty | Fak. 4 Elektrotechnik und Informatik | de |
| tub.affiliation.group | FG Architektur eingebetteter Systeme | de |
| tub.affiliation.institute | Inst. Technische Informatik und Mikroelektronik | de |
| tub.publisher.universityorinstitution | Technische Universität Berlin | en |
| tub.series.issuenumber | 6271 | en |
| tub.series.name | Lecture Notes in Computer Science | en |