Design and layout strategies for integrated frequency synthesizers with high spectral purity
| dc.contributor.author | Herzel, Frank | |
| dc.contributor.author | Kissinger, Dietmar | |
| dc.date.accessioned | 2019-02-11T17:20:54Z | |
| dc.date.available | 2019-02-11T17:20:54Z | |
| dc.date.issued | 2017 | |
| dc.description | Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich. | de |
| dc.description | This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively. | en |
| dc.description.abstract | Design guidelines for fractional-N phase-locked loops with a high spectral purity of the output signal are presented. Various causes for phase noise and spurious tones (spurs) in integer-N and fractional-N phase-locked loops (PLLs) are briefly described. These mechanisms include device noise, quantization noise folding, and noise coupling from charge pump (CP) and reference input buffer to the voltage-controlled oscillator (VCO) and vice versa through substrate and bondwires. Remedies are derived to mitigate the problems by using proper PLL parameters and a careful chip layout. They include a large CP current, sufficiently large transistors in the reference input buffer, linearization of the phase detector, a high speed of the programmable frequency divider, and minimization of the cross-coupling between the VCO and the other building blocks. Examples are given based on experimental PLLs in SiGe BiCMOS technologies for space communication and wireless base stations. | en |
| dc.description.sponsorship | BMBF, 03ZZ0512A, Zwanzig20 - Verbundvorhaben: fast-spot; TP1: Modularer Basisband- Prozessor mit extrem hohen Datenraten, sehr kurzen Latenzzeiten und SiGe-Analog-Frontend-IC-Fertigung bei >200 GHz Trägerfrequenz | en |
| dc.identifier.eissn | 1759-0795 | |
| dc.identifier.issn | 1759-0787 | |
| dc.identifier.uri | https://depositonce.tu-berlin.de/handle/11303/9092 | |
| dc.identifier.uri | http://dx.doi.org/10.14279/depositonce-8193 | |
| dc.language.iso | en | |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | |
| dc.subject.ddc | 620 Ingenieurwissenschaften und zugeordnete Tätigkeiten | de |
| dc.subject.other | noise analysis | en |
| dc.subject.other | RF front-ends | en |
| dc.subject.other | frequency synthesizer | en |
| dc.title | Design and layout strategies for integrated frequency synthesizers with high spectral purity | en |
| dc.type | Article | en |
| dc.type.version | publishedVersion | en |
| dcterms.bibliographicCitation.doi | 10.1017/S1759078717000654 | |
| dcterms.bibliographicCitation.issue | 9 | |
| dcterms.bibliographicCitation.journaltitle | International Journal of Microwave and Wireless Technologies | en |
| dcterms.bibliographicCitation.originalpublishername | Cambridge University Press | en |
| dcterms.bibliographicCitation.pageend | 1797 | |
| dcterms.bibliographicCitation.pagestart | 1791 | |
| dcterms.bibliographicCitation.volume | 9 | |
| tub.accessrights.dnb | domain | |
| tub.affiliation | Fak. 4 Elektrotechnik und Informatik::Inst. Hochfrequenz- und Halbleiter-Systemtechnologien | de |
| tub.affiliation.faculty | Fak. 4 Elektrotechnik und Informatik | de |
| tub.affiliation.institute | Inst. Hochfrequenz- und Halbleiter-Systemtechnologien | de |
| tub.publisher.universityorinstitution | Technische Universität Berlin | de |
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