A generic implementation of a quantified predictor on FPGAs

dc.contributor.authorThomas, Gervin
dc.contributor.authorElhossini, Ahmed
dc.contributor.authorJuurlink, Ben
dc.date.accessioned2017-10-26T10:38:35Z
dc.date.available2017-10-26T10:38:35Z
dc.date.issued2014
dc.description.abstractPredictors are used in many fields of computer architectures to enhance performance. With good estimations of future system behaviour, policies can be developed to improve system performance or reduce power consumption. These policies become more effective if the predictors are implemented in hardware and can provide quantified forecasts and not only binary ones. In this paper, we present and evaluate a generic predictor implemented in VHDL running on an FPGA which produces quantified forecasts. Moreover, a complete scalability analysis is presented which shows that our implementation has a maximum device utilization of less than 5%. Furthermore, we analyse the power consumption of the predictor running on an FPGA. Additionally, we show that this implementation can be clocked by over 210 MHz. Finally, we evaluate a power-saving policy based on our hardware predictor. Based on predicted idle periods, this power-saving policy uses power-saving modes and is able to reduce memory power consumption by 14.3%.en
dc.identifier.isbn978-1-4503-2816-6
dc.identifier.urihttps://depositonce.tu-berlin.de/handle/11303/7021
dc.identifier.urihttp://dx.doi.org/10.14279/depositonce-6342
dc.language.isoen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.subject.ddc004 Datenverarbeitung; Informatik
dc.subject.otherRTLen
dc.subject.otherVHDLen
dc.subject.otherpower consumptionen
dc.subject.otherpredictoren
dc.titleA generic implementation of a quantified predictor on FPGAsen
dc.typeConference Objecten
dc.type.versionacceptedVersionen
dcterms.bibliographicCitation.doi10.1145/2591513.2591517
dcterms.bibliographicCitation.originalpublishernameAssociation for Computing Machinery (ACM)en
dcterms.bibliographicCitation.originalpublisherplaceNew York, NYen
dcterms.bibliographicCitation.pageend260
dcterms.bibliographicCitation.pagestart255
dcterms.bibliographicCitation.proceedingstitleProceedings of the 24th Edition of the Great Lakes Symposium on VLSIen
tub.accessrights.dnbdomain
tub.affiliationFak. 4 Elektrotechnik und Informatik::Inst. Technische Informatik und Mikroelektronik::FG Architektur eingebetteter Systemede
tub.affiliation.facultyFak. 4 Elektrotechnik und Informatikde
tub.affiliation.groupFG Architektur eingebetteter Systemede
tub.affiliation.instituteInst. Technische Informatik und Mikroelektronikde
tub.publisher.universityorinstitutionTechnische Universität Berlinen

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